EEPROMs are memories that are electrically programmable and erasable by the tunnel effect (or Fowler Nordheim effect). These EEPROMs include memory cells comprising a floating-gate transistor and a selection transistor that is sometimes common to a group of cells forming a word. These are commonly used memories, and, accordingly, instruction protocols have been developed by manufacturers so that they can be mutually interchanged.
FLASH type memories are memories that are electrically programmable by hot electrons and electrically erasable by the tunnel effect. These memories are provided by storage cells comprising a single floating-gate transistor. The applications in which FLASH memories are used are often different from the applications in which EEPROMs are used. Moreover, FLASH memories are classically not compatible with EEPROM memories.
Since FLASH memories take up less space than EEPROM memories and can be programmed more speedily, the manufacturers of memories have conceived the idea of making a FLASH memory whose operation is compatible with that of a standard EEPROM. However, since the programming methods are different, adaptations are needed, causing certain problems to those skilled in the art.
The present invention pertains essentially to an instruction that is commonly used with EEPROM type memories. The instruction in question is a page-write operation followed by a write protection of the memory. According to the data books of the manufacturers of EEPROM type memories, the instruction is sent to the memory as follows: specific words are written at specific addresses, then the data elements of a given page are written, the page being defined as containing all the addresses of one and the same word line of the memory array. The writing of specific words at specific addresses defines the instruction.
By way of an example, FIG. 1 reproduces the standard sequence given by SGS-THOMSON MICROELECTRONICS for the memory marketed under the reference M28C64. This sequence is made for a memory with 13 address bits and 8 data bits. Since the addresses may vary according to the capacity of the memory, those skilled in the art can ascertain that the addresses always have the same form for the EEPROM type memories.
In an EEPROM memory, a microcontroller identifies the instruction sequence. Then the data elements to be written in the page are stored in buffer registers. When all the registers corresponding to a page have received a data element, the microcontroller starts a parallel write operation in all the cells of the word line and in a storage cell, conventionally called an SDP (for Software Data Protection) which indicates that the memory is protected and prohibits writing in the memory. The SDP cell is of same type as the memory cells providing the memory array, but is generally separate from the memory array. In EEPROM memories, a simple AND gate receiving the memory write command and a bit indicating the writing of the SDP are enough to carry out the programming of the SDP cell.
The transposition of this type of instruction to a FLASH type memory poses a problem to those skilled in the art. Indeed, programming by hot electrons requires greater energy than programming by the tunnel effect. Consequently, the parallel writing of all the data elements in the memory is unthinkable in a FLASH type memory. To write the data elements present in the various registers, a sequential write operation is used, programming the memory word by word. However, in this case it is no longer possible to manage the SDP cell in the same way as an EEPROM. An obvious approach may include using the microcontroller to program the SDP cell after having finished the writing of the page. Nevertheless, this approach is rather cumbersome and slows down the microcontroller.
It may be desirable to have a device for the writing of the SDP cell that enables the automatic writing of this SDP cell without the intervention of the microcontroller. It may also be desirable to use a microcontroller not very different from that used for an EEPROM, thus reducing the time needed to devise and finalize the microcontroller and its program.